TY - GEN
T1 - Automated design of multirate switched-capacitor filter using constrained optimization approach
AU - Ngai, Cheong
PY - 2006
Y1 - 2006
N2 - This paper presents an approved automated design of analog multi-rate switched-capacitor (SC) filters using the constrained optimization approach with equality constraints. The procedure can optimally distribute a variety of capacitance values in the input branches of individual SC filter, by minimizing the overall capacitor spread while simultaneously to achieve minimum total capacitor area. Compared to the traditional design methods, this method can simplify and approve the design processes, and make it easy to carry out the automatic implementation, while maintaining the same frequency responses. For demonstrating the efficiency of this modeling, a design procedure of a 2nd order SC decimator is presented in this paper.
AB - This paper presents an approved automated design of analog multi-rate switched-capacitor (SC) filters using the constrained optimization approach with equality constraints. The procedure can optimally distribute a variety of capacitance values in the input branches of individual SC filter, by minimizing the overall capacitor spread while simultaneously to achieve minimum total capacitor area. Compared to the traditional design methods, this method can simplify and approve the design processes, and make it easy to carry out the automatic implementation, while maintaining the same frequency responses. For demonstrating the efficiency of this modeling, a design procedure of a 2nd order SC decimator is presented in this paper.
UR - http://www.scopus.com/inward/record.url?scp=34748927199&partnerID=8YFLogxK
U2 - 10.1109/MWSCAS.2006.382257
DO - 10.1109/MWSCAS.2006.382257
M3 - Conference contribution
AN - SCOPUS:34748927199
SN - 1424401739
SN - 9781424401734
T3 - Midwest Symposium on Circuits and Systems
SP - 249
EP - 253
BT - Proceedings of the 2006 49th Midwest Symposium on Circuits and Systems, MWSCAS'06
T2 - 2006 49th Midwest Symposium on Circuits and Systems, MWSCAS'06
Y2 - 6 August 2006 through 9 August 2007
ER -