Batched circuit switched routing for efficient service of requests

Aaron Harwood, Hong Shen

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Citation (Scopus)

Abstract

Circuit switching protocols were largely developed in light of ATM virtual circuits and also for the case of all-optical networks. The merging of ATM and IP packet switching technology may banish true circuit switching in the digital domain due to fast switching networks using TDM. Even so, the characteristics of all-optical light paths (an optical circuit switched path) are so desirable that digital WAN's using ATM may eventually be completely augmented by optical WAN's using a hybrid optoelectronic or complete optical switching fabric. A fundamental problem is servicing a large number of requests while maintaining a low blocking probability where a request is blocked if the path it requires is in use by a circuit. We present a simple routing method, namely Batched Circuit Switching (BCS), that batches requests according to the rate of arrival and service time. Compared to orthodox Circuit Switching (CS), BCS provides superior request service times due to the observation that many requests may traverse the same circuit (or channel) during the batch time interval, rather than being blocked by preceding requests (as is the case for CS). Thus, BCS exhibits better utilization of the network resources than CS. We demonstrate the requirements for this system to be stable, namely that the batch size must not increase to infinity before being serviced and the relationship between X (the arrival rate of requests) and p (the service rate of requests) to ensure stability.

Original languageEnglish
Title of host publicationProceedings - International Symposium on Parallel Architectures, Algorithms, and Networks, I-SPAN 2000
EditorsHal Sudborough, Burkhard Monien, D. Frank Hsu
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages30-35
Number of pages6
ISBN (Electronic)0769509363, 9780769509365
DOIs
Publication statusPublished - 2000
Externally publishedYes
Event5th International Symposium on Parallel Architectures, Algorithms, and Networks, I-SPAN 2000 - Dallas, United States
Duration: 7 Dec 20009 Dec 2000

Publication series

NameProceedings - International Symposium on Parallel Architectures, Algorithms, and Networks, I-SPAN 2000

Conference

Conference5th International Symposium on Parallel Architectures, Algorithms, and Networks, I-SPAN 2000
Country/TerritoryUnited States
CityDallas
Period7/12/009/12/00

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