An OpenCL™ implementation of WebP accelerator on FPGAs

Zhenhua Guo; Baoyu Fan; Yaqian Zhao; Xuelei Li; Shixin Wei; Long Li

doi:10.1007/978-3-319-78890-6_46

An OpenCL™ implementation of WebP accelerator on FPGAs

Zhenhua Guo
, Baoyu Fan
, Yaqian Zhao
, Xuelei Li
, Shixin Wei
, Long Li

State Key Laboratory of High-end Server Storage Technology

研究成果: Conference contribution › 同行評審

2 引文斯高帕斯（Scopus）

摘要

With the development of cloud computing, the super-large scale of image data has bring severe challenges for the storage cost and network bandwidth in data centers. In order to alleviate the present situation effectively, WebP has replaced the current mainstream image file format due to its better compression efficiency. In this paper, we provide an OpenCL implementation of WebP accelerator on FPGAs to optimize the performance of WebP Lossy Compression Algorithm. Our accelerator makes use of a heavily-pipelined custom hardware implementation to achieve a high throughput ~450MPixel/s. The performance-per-watt of our OpenCL implementation on Intel’s Arria 10 device is 8.32x better than a highly-tuned CPU implementation on Intel Xeon E5-2690v3 with 24 thread cores. Additionally, the delay time per image can be reduced to ~90% by the data parallelism and macroblock pipelining on FPGAs. Finally, our OpenCL™ implementation of WebP accelerator on FPGAs is more competitive for data centers to achieve higher performance and lower cost.

原文	English
主出版物標題	Applied Reconfigurable Computing
主出版物子標題	Architectures, Tools, and Applications - 14th International Symposium, ARC 2018, Proceedings
編輯	Nikolaos Voros, Georgios Keramidas, Christos Antonopoulos, Michael Huebner, Pedro C. Diniz, Diana Goehringer
發行者	Springer Verlag
頁面	578-589
頁數	12
ISBN（列印）	9783319788890
DOIs	https://doi.org/10.1007/978-3-319-78890-6_46
出版狀態	Published - 2018
對外發佈	是
事件	14th International Symposium on Applied Reconfigurable Computing, ARC 2018 - Santorini, Greece 持續時間: 2 5月 2018 → 4 5月 2018

出版系列

名字	Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
卷	10824 LNCS
ISSN（列印）	0302-9743
ISSN（電子）	1611-3349

Conference

Conference	14th International Symposium on Applied Reconfigurable Computing, ARC 2018
國家/地區	Greece
城市	Santorini
期間	2/05/18 → 4/05/18

存取文件

10.1007/978-3-319-78890-6_46

其它文件與鏈接

Link to publication in Scopus

引用此

Guo, Z., Fan, B., Zhao, Y., Li, X., Wei, S., & Li, L. (2018). An OpenCL™ implementation of WebP accelerator on FPGAs. 於 N. Voros, G. Keramidas, C. Antonopoulos, M. Huebner, P. C. Diniz, & D. Goehringer (編輯), Applied Reconfigurable Computing: Architectures, Tools, and Applications - 14th International Symposium, ARC 2018, Proceedings (頁 578-589). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); 卷 10824 LNCS). Springer Verlag. https://doi.org/10.1007/978-3-319-78890-6_46

Guo, Zhenhua ; Fan, Baoyu ; Zhao, Yaqian 等. / An OpenCL™ implementation of WebP accelerator on FPGAs. Applied Reconfigurable Computing: Architectures, Tools, and Applications - 14th International Symposium, ARC 2018, Proceedings. 編輯 / Nikolaos Voros ; Georgios Keramidas ; Christos Antonopoulos ; Michael Huebner ; Pedro C. Diniz ; Diana Goehringer. Springer Verlag, 2018. 頁 578-589 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)).

@inproceedings{91aae368232141abb24cedb8d6d92a7b,

title = "An OpenCL{\texttrademark} implementation of WebP accelerator on FPGAs",

abstract = "With the development of cloud computing, the super-large scale of image data has bring severe challenges for the storage cost and network bandwidth in data centers. In order to alleviate the present situation effectively, WebP has replaced the current mainstream image file format due to its better compression efficiency. In this paper, we provide an OpenCL implementation of WebP accelerator on FPGAs to optimize the performance of WebP Lossy Compression Algorithm. Our accelerator makes use of a heavily-pipelined custom hardware implementation to achieve a high throughput \textasciitilde{}450MPixel/s. The performance-per-watt of our OpenCL implementation on Intel{\textquoteright}s Arria 10 device is 8.32x better than a highly-tuned CPU implementation on Intel Xeon E5-2690v3 with 24 thread cores. Additionally, the delay time per image can be reduced to \textasciitilde{}90\% by the data parallelism and macroblock pipelining on FPGAs. Finally, our OpenCL{\texttrademark} implementation of WebP accelerator on FPGAs is more competitive for data centers to achieve higher performance and lower cost.",

keywords = "Accelerator, FPGAs, OpenCL, WebP",

author = "Zhenhua Guo and Baoyu Fan and Yaqian Zhao and Xuelei Li and Shixin Wei and Long Li",

note = "Publisher Copyright: {\textcopyright} Springer International Publishing AG, part of Springer Nature 2018.; 14th International Symposium on Applied Reconfigurable Computing, ARC 2018 ; Conference date: 02-05-2018 Through 04-05-2018",

year = "2018",

doi = "10.1007/978-3-319-78890-6\_46",

language = "English",

isbn = "9783319788890",

series = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",

publisher = "Springer Verlag",

pages = "578--589",

editor = "Nikolaos Voros and Georgios Keramidas and Christos Antonopoulos and Michael Huebner and Diniz, \{Pedro C.\} and Diana Goehringer",

booktitle = "Applied Reconfigurable Computing",

address = "Germany",

}

Guo, Z, Fan, B, Zhao, Y, Li, X, Wei, S & Li, L 2018, An OpenCL™ implementation of WebP accelerator on FPGAs. 於 N Voros, G Keramidas, C Antonopoulos, M Huebner, PC Diniz & D Goehringer (編輯), Applied Reconfigurable Computing: Architectures, Tools, and Applications - 14th International Symposium, ARC 2018, Proceedings. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), 卷 10824 LNCS, Springer Verlag, 頁 578-589, 14th International Symposium on Applied Reconfigurable Computing, ARC 2018, Santorini, Greece, 2/05/18. https://doi.org/10.1007/978-3-319-78890-6_46

An OpenCL™ implementation of WebP accelerator on FPGAs. / Guo, Zhenhua; Fan, Baoyu; Zhao, Yaqian 等.
Applied Reconfigurable Computing: Architectures, Tools, and Applications - 14th International Symposium, ARC 2018, Proceedings. 編輯 / Nikolaos Voros; Georgios Keramidas; Christos Antonopoulos; Michael Huebner; Pedro C. Diniz; Diana Goehringer. Springer Verlag, 2018. p. 578-589 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); 卷 10824 LNCS).

研究成果: Conference contribution › 同行評審

TY - GEN

T1 - An OpenCL™ implementation of WebP accelerator on FPGAs

AU - Guo, Zhenhua

AU - Fan, Baoyu

AU - Zhao, Yaqian

AU - Li, Xuelei

AU - Wei, Shixin

AU - Li, Long

N1 - Publisher Copyright: © Springer International Publishing AG, part of Springer Nature 2018.

PY - 2018

Y1 - 2018

N2 - With the development of cloud computing, the super-large scale of image data has bring severe challenges for the storage cost and network bandwidth in data centers. In order to alleviate the present situation effectively, WebP has replaced the current mainstream image file format due to its better compression efficiency. In this paper, we provide an OpenCL implementation of WebP accelerator on FPGAs to optimize the performance of WebP Lossy Compression Algorithm. Our accelerator makes use of a heavily-pipelined custom hardware implementation to achieve a high throughput ~450MPixel/s. The performance-per-watt of our OpenCL implementation on Intel’s Arria 10 device is 8.32x better than a highly-tuned CPU implementation on Intel Xeon E5-2690v3 with 24 thread cores. Additionally, the delay time per image can be reduced to ~90% by the data parallelism and macroblock pipelining on FPGAs. Finally, our OpenCL™ implementation of WebP accelerator on FPGAs is more competitive for data centers to achieve higher performance and lower cost.

AB - With the development of cloud computing, the super-large scale of image data has bring severe challenges for the storage cost and network bandwidth in data centers. In order to alleviate the present situation effectively, WebP has replaced the current mainstream image file format due to its better compression efficiency. In this paper, we provide an OpenCL implementation of WebP accelerator on FPGAs to optimize the performance of WebP Lossy Compression Algorithm. Our accelerator makes use of a heavily-pipelined custom hardware implementation to achieve a high throughput ~450MPixel/s. The performance-per-watt of our OpenCL implementation on Intel’s Arria 10 device is 8.32x better than a highly-tuned CPU implementation on Intel Xeon E5-2690v3 with 24 thread cores. Additionally, the delay time per image can be reduced to ~90% by the data parallelism and macroblock pipelining on FPGAs. Finally, our OpenCL™ implementation of WebP accelerator on FPGAs is more competitive for data centers to achieve higher performance and lower cost.

KW - Accelerator

KW - FPGAs

KW - OpenCL

KW - WebP

UR - https://www.scopus.com/pages/publications/85046284836

U2 - 10.1007/978-3-319-78890-6_46

DO - 10.1007/978-3-319-78890-6_46

M3 - Conference contribution

AN - SCOPUS:85046284836

SN - 9783319788890

T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

SP - 578

EP - 589

BT - Applied Reconfigurable Computing

A2 - Voros, Nikolaos

A2 - Keramidas, Georgios

A2 - Antonopoulos, Christos

A2 - Huebner, Michael

A2 - Diniz, Pedro C.

A2 - Goehringer, Diana

PB - Springer Verlag

T2 - 14th International Symposium on Applied Reconfigurable Computing, ARC 2018

Y2 - 2 May 2018 through 4 May 2018

ER -

Guo Z, Fan B, Zhao Y, Li X, Wei S, Li L. An OpenCL™ implementation of WebP accelerator on FPGAs. 於 Voros N, Keramidas G, Antonopoulos C, Huebner M, Diniz PC, Goehringer D, 編輯, Applied Reconfigurable Computing: Architectures, Tools, and Applications - 14th International Symposium, ARC 2018, Proceedings. Springer Verlag. 2018. p. 578-589. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)). doi: 10.1007/978-3-319-78890-6_46

An OpenCL™ implementation of WebP accelerator on FPGAs

摘要

出版系列

Conference

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其它文件與鏈接

指紋

引用此